Synonyms for ovpsim or Related words with ovpsim
Examples of "ovpsim"
is considered instruction accurate, but not cycle-accurate.
can be encapsulated and called from within other simulation environments and comes as standard with interface files for C, C++, and SystemC.
includes native SystemC TLM2.0 interface files. It is also possible to encapsulate legacy models of processors and behavioral models so that they can be used by
is a multiprocessor platform emulator (often called a full-system simulator) used to run unchanged production binaries of the target hardware.
uses dynamic binary translation technology to achieve high simulation speeds. It has public APIs allowing users to create their own processor, peripheral and platform models. Various models are available as open source.
is a key component of the Open Virtual Platforms initiative (OVP), an organization created to promote the use of open virtual platforms for embedded software development.
requires OVP registration to download.
simulator is available as an OVP reference and is free for non-commercial usage. The simulator uses dynamic binary translation technology to achieve very high simulation speeds. More than a billion simulated instructions per second is possible, in some cases on regular desktop PC machines.
is available for x86 Windows and Linux hosts.
comes with a GDB RSP interface to allow applications running on simulated processors to be debugged with any standard debugger that supports this GDB RSP interface.
comes with the Imperas iGui Graphical Debugger and also an Eclipse IDE and CDT interface.
VinChip Systems Inc. of Chennai, India used OpenOCD and
to develop what may be the first 32-bit processor developed in India.
is developed and maintained by Imperas. The core simulation platform is proprietary software; it is available free of charge for non-commercial usage. Commercial usage requires a low-cost license from Imperas to cover maintenance.
There are three main components of OVP: open source models, fast
simulator, and modeling APIs. These components are designed to make it easy to assemble multi-core heterogeneous or homogeneous platforms with complex memory hierarchies, cache systems and layers of embedded software that can run at hundreds of MIPS on standard desktop PCs.
is being used by multiple educational establishments to provide a simulation infrastructure for the research of parallel compute platforms, hardware software co-design, performance analysis of embedded systems, and as the basis of other embedded tool developments. It is also leveraged for educational courses to allow students to develop and debug application software and create virtual platforms and new models.
Open Virtual Platforms (OVP) includes the freely available for non-commercial use simulator
, a library of models of processors, peripherals and platforms, and APIs which enable users to develop their own models. The models in the library are open source, written in C, and include the MIPS 4K, 24K, 34K, 74K, 1004K, 1074K, M14K, microAptiv, interAptiv, proAptiv 32 bit cores and the MIPS 64bit 5K range of cores. These models are created and maintained by Imperas and in partnership with MIPS Technologies have been tested and assigned the MIPS-Verified (tm) mark. Sample MIPS-based platforms include both bare metal environments and platforms for booting unmodified Linux binary images. These platforms–emulators are available as source or binaries and are fast, free for non-commercial usage, and are easy to use.
is developed and maintained by Imperas and is very fast (hundreds of million of instructions per second), and built to handle multicore homogeneous and heterogeneous architectures and systems.
A number of leading commercial organizations also use
as the basis of their product offerings. The technology was licensed by MIPS Technologies to provide modeling support for their MIPS architecture embedded processor range, features in a partnership with leading processor provider ARM, and is part of the Europractice product range for general access to European universities. Leading Semiconductor companies such as Renesas have used the simulator for its processor development work, as disclosed in leading electronic industry publications. It was selected by NEPHRON+, an EU research project, for its software and test development environment.
Within OVP there are several different model categories. These models are provided as both pre-compiled object code, and as in some cases, source files.
no longer supplies source code for the ARM and MIPS processor models. Currently there are processor models of ARM (processors using the ARMv4, ARMv5, ARMv6, ARMv7, ARMv8 instruction sets) up to the ARM Cortex-A72MPx4 (and including multi-cluster ARMv8 models with GICv3), Imagination MIPS (processors using MIPS32, MIPS64, microMIPS and MIPS R6 instruction sets) up to the microAptiv, interAptiv, proAptiv, and Warrior cores, Synopsys Virage ARC600/ARC700 and ARC EM series, Renesas v850, RH850, RL78 and m16c, PowerPC, Altera Nios II, Xilinx MicroBlaze, RISC-V (models using 32bit RV32I, RV32M, RV32A, RV32F, RV32D, RV32G ISA subsets and their 64bit versions), and OpenRisc families. There are also models of many different types of system components including RAM, ROM, cache, and bridge. There are peripheral models such as Ethernet MAC, USB, DMA, UART, and FIFO. Several different pre-built platforms are available, including the most common operating systems ucLinux, Linux, Android, FreeRTOS, Nucleus, Micrium.
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